{"ok":true,"data":{"id":"DGP-R5QQZZBKTSR1","type":"person","kind":"professional","name":"Ritesh Kumar","slug":"ritesh-kumar","headline":"Intern at SION Semiconductor pvt ltd.","summary":"Ritesh Kumar was Intern at SION Semiconductor pvt ltd., and studied BE BTech at Birla Institute of Technology Mesra, based in Ranchi. Strongest assessed skills: VLSI.","location":{"city":"Ranchi","region":"Jharkhand","country":"IN","country_name":"India"},"career":[{"title":"Intern","organization":{"name":"SION Semiconductor pvt ltd."},"from":"2017-05-01","to":"2017-06-01","current":false,"function":"other","seniority":"student"},{"title":"Traniee","organization":{"name":"INDO Danish Tool Room"},"from":"2016-06-01","to":"2016-07-01","current":false,"function":"other","seniority":"professional"}],"education":[{"degree":"Bachelor of Engineering or Technology","field":"Electronics and Tele-Communication Engineering","institution":{"name":"Birla Institute of Technology Mesra"},"from":2014,"to":2018}],"skills":[{"name":"VLSI","score":76.5,"tested":true,"rank":84,"of":11946}],"interests":["Cricket"],"looking_for":["Internship"],"career_aim":"To work in a firm with a professional work driven environment where I can utilize and apply my knowledge, skill which would enable me as a fresh graduate to grow while fulfilling organizational goals.","achievements":{"projects":[{"name":"Design and implementation of UART using Verilog HDL.","description":"Universal asynchronous receiver transmitter (UART) is a serial communication interface. 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To simulate those traffic lights we will use the Red, Yellow and …","from":"2017-05-01","to":"2017-06-01"},{"name":"FPGA: Interfacing of various peripherals with FPGA.","description":"FPGA interfacing has been achieved with various on Board and external peripherals interfacing on board LCD display, 7 segment display, ALU etc.","from":"2016-05-01","to":"2016-06-01"}]},"network":{"classmates":[{"id":"DGP-AEKAZMEM2B8C","name":"Subhash Kumar","slug":"subhash-kumar","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-HR70B5J1NM10","name":"Radheshyam Tiwari","slug":"radheshyam-tiwari","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-KE9TWJHNDGD9","name":"Sindhuja Voruganti","slug":"sindhuja-voruganti","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-VSGMC1V7K1FB","name":"Juhi Singh","slug":"juhi-singh","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-TP14V6TPYDSP","name":"Amit Singh","slug":"amit-singh","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-21SA6DHS9GCS","name":"Sunil Kumar Sah","slug":"sunil-kumar-sah","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-JESY0K3X1FZV","name":"Divya Bharti","slug":"divya-bharti","via":"Birla Institute of Technology Mesra, class of 2018"},{"id":"DGP-TX3RATREY6J4","name":"Raushan Kumar","slug":"raushan-kumar","via":"Birla Institute of Technology Mesra, class of 2018"}]},"contacts":{"emails":[{"masked":"r***@g***.com","status":"uncertain"},{"masked":"r***@r***.com","status":"unverified"}],"phones":[{"masked":"70******61","status":"verified"},{"masked":"82******72","status":"unverified"}]},"visibility":"public","index":true,"joined":"2017-03-27","identifiers":{"y4w":"1855535"},"quality":{"overall":"silver","sections":{"career":"bronze","skills":"silver","achievements":"bronze","profile":"bronze","network":"bronze"}},"sources":[{"name":"Career platform profile","as_of":"2026-10-03","note":"Self-reported, with assessment scores where tested"}],"updated":"2026-10-03T00:00:00Z","url":"https://datagalactica.com/person/DGP-R5QQZZBKTSR1/ritesh-kumar"},"meta":{"api":"v1","standard":"Galactica Entity Standard v1","docs":"https://datagalactica.com/api","note":"Contact fields are masked (only a full-data key with the contacts scope adds an unmasked contact object). Bronze means one unconfirmed source and may be a different real-world entity; prefer the higher grade when names collide. Cite the Galactica ID and the page url."}}